Wafer Bumping

Wafer-BumpingCVI provides quick turn bumping of wafers for development, qualification, sampling and prototype builds. Bumps are available in leaded and lead free alloys.

Expedited bump builds, including RDL and fanout, can be completed in 4-6 working days depending on number of metal and passivation layers.

Wafer Materials Si, GaAs, Pyrex, Alumina Up to 8”
RDL Cu (typical 6um thick) Al (typical 1.25um thick) Aspect and gap (call for details)
Passivation layer Available PBO and polyimide layers in both high temp and low temp alternative (<200C cure for Pi/PBO) Customer specified
Bump ENIG pillars, SnPb, SAC and indium solders Bump size specified by customer
Thinning Down to 100um Customer defined
Singulation and pack P1 marking available

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